A high-voltage transistor comprises a channel region between source and drain that is controlled by a gate electrode separated from the semiconductor material by the gate dielectric. A drift section is provided between the channel region and the drain. Above the drift section, an isolation region can be provided, which can be a field oxide in particular, or a shallow trench isolator that is formed from an oxide of the semiconductor material. A field plate, connected to the gate electrode and used for influencing the electric field in the drift section, can be arranged on top of this isolation region.
The publication by T. R. Efland et al.: “Lateral Thinking About Power Devices (LDMOS)” in IEDM 98, pp. 679-682, 1998, describes an LDMOS transistor in which the gate oxide has different thicknesses in certain areas, so that a step is present in the gate oxide above the channel region. The thicker portion of the gate oxide is situated partially above the channel region and partially above a region of an n-type well present between the channel region and a high-doped n-type region of the drain. The operating properties of this transistor are also described in this publication.